Cirrus公司的CS485xx系列(S48520, CS48540和CS48560)數(shù)字音頻32位DSP,提供高性能的后處理和不同取樣速率的數(shù)字音頻的混合.DSP每秒可進行300,000,000次乘法和累加運算(MAC),具有業(yè)界最精確的72位累加器, 24k x 32 SRAM, 192 kHz SPDIF發(fā)送器, 1.8V內(nèi)核單壓和兼容5V的3.3V I/O電壓.主要用在汽車音頻系統(tǒng),DTV,HD-DVD和藍光DVD播放器以及PC揚聲器.本文介紹了CS485xx系列主要特性, 系統(tǒng)框圖和CDB48500-USB評估板主要特性,方框圖和詳細電路圖.
The CS485xx DSP Family is designed to provide high-performance post-processing and mixing of digital audio. The dual clock domain provided on the PCM inputs allows for the mixing of audio streams with different sampling frequencies. The low-power standby preserves battery life for applications which are always on, but not necessarily processing audio, such as automotive audio systems.
There are three devices comprising the CS485xx family. The CS48520, CS48540 and CS48560 are differentiated by the number of inputs and outputs available. All DSPs support dual input clock domains and dual audio processing paths. All DSPs are available in a 48-pin QFP package.
CS485xx系列主要特性:
Cost-effective, High-performance 32-bit DSP
— 300,000,000 MAC/S (multiply accumulates per second)
— Dual MAC cycles per clock
— 72-bit accumulators are the most accurate in the industry
— 24k x 32 SRAM, 2k blocks - assignable to data or program
— Internal ROM contains a variety of configurable sound enhancement feature sets
— 8-channel internal DMA
— Internal watch-dog DSP lock-up prevention
DSP Tool Set w/ Private Keys for Protecting Customer IP
Configurable Serial Audio Inputs/Outputs
— Configurable for all input/output types
— Maximum 32-bit @ 192 kHz
— Supports 32-bit audio sample I/O between DSP chips
— TDM input modes (multiple channels on same line)
— 192 kHz SPDIF transmitter
— Multi-channel DSD direct stream digital SACD input
Supports Two Different Input Fs Sample Rates
— Output can be master or slave
— Dual processing path capability
— Input supports dual domain slave clocking
— Hardware assist time sampling for sample rate conversion
Integrated Clock Manager/PLL
— Can operate from external crystal, external oscillator
Input Fs Auto Detection
Host & Boot via Serial Interface
Configurable GPIOs and External Interrupt Input
1.8V Core and a 3.3V I/O that is tolerant to 5V input
Low-power Mode
— “Energy Star® Ready” in low-power mode, 268 μW in standby
Differentiating from the legacy Cirrus multi-standard, multichannel decoders, this new CS485xx family is still based on the same high-performance 32-bit fixed point Digital Signal Processor core but instead is equipped with much less memory, tailoring it for more cost-effective applications associated with multi-channel and virtual-channel sound enhancements.
CS485xx系列目標應(yīng)用:
— Digital Televisions
— Multimedia Peripherals
— iPod® Docking Stations
— Automotive Head Units
— Automotive Outboard Amplifiers
— HD-DVD & Blu-ray Disc DVD Receivers
— PC Speakers
圖1.CS48500系統(tǒng)框圖
CDB48500-USB評估板
Each CDB48500-USB kit comes with the following:
• CDB48500 Development Board (See Figure 1-2)
• Power Supply: +9V, 1.67A, 100V - 240V, with AC Power Cord
• CDB USB MASTER Digital I/O Card (See Figure 1-2)
• USB Cable
• 3 Board Overlays Identifying the Outputs for CS48520, CS48540, and CS48560
• Document Card Explaining How to Get the Latest Board Software
The CDB48500-USB is a convenient and easy-to-operate evaluation platform. It has been designed to demonstrate the majority of the CS485XX functions on a small 6" x 6.5" base board.
CDB48500-USB評估板特性:
• PC control of the CS485XX using the DSP Composer™ graphical user interface
• Serial control of audio devices on CDB48500 via I2C® or SPI™ protocols
• Digital audio input of PCM via optical or coaxial S/PDIF (does not support compressed data input)
• Up to 12-channel analog audio input via the two CS42448 audio codecs
• Up to 12-channel analog output through the two CS42448 audio codecs
• Digital audio output of PCM data via optical S/PDIF
• Headphone output jack
• Multi-channel digital audio input via the CDB USB MASTER card (not yet supported)
• Separate input and output clocking domains to allow 1FS-to-2FS audio processing on the CS485XX
• Fast boot – host-controlled master boot (HCMB) of custom applications from 4 Mbit serial SPI flash device.
• Microphone input with integrated amplifier for Intelligent Room Calibration (IRC) evaluation (future)
• Supports all members of the CS485XX family in the 48-pin LQFP package.
圖2.CDB48500-USB評估板框圖
圖3.CDB48500-USB評估板外形圖
圖4.CDB48500-USB評估板連接圖
圖5.CDB48500-USB評估板框圖
圖6.CDB48500-USB評估板電路圖:DSP輸入數(shù)據(jù)復(fù)接電路
圖7.CDB48500-USB評估板電路圖:DSP電路
圖8.CDB48500-USB評估板電路圖:串行閃存存儲器電路
圖9.CDB48500-USB評估板電路圖:SPDIF接收器電路
圖10.CDB48500-USB評估板電路圖:CODEC #1(CS42448)電路
圖11.CDB48500-USB評估板電路圖:CODEC #2(CS42448)電路
圖12.CDB48500-USB評估板電路圖:CODEC #1(CS42448)電路
圖13. CODEC 1和CODEC 2輸入濾波器電路圖
圖14.CDB48500-USB輸出濾波器和耳機輸出電路圖
圖15.CDB48500-USB評估板電路圖:麥克風預(yù)放大電路
圖16.CDB48500-USB評估板電路圖: 控制連接和電源電路 |
